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| MP1494 high-efficiency, 2a, 16v, 500khz synchronous, step-down converter MP1494 rev. 1.04 www.monolithicpower.com 1 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the MP1494 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a very compact solution to achieve a 2a continuous output current with excellent load and line regulation over a wide input supply range. the MP1494 has synchronous mode operation for higher efficiency over the output current load range. current-mode operation provides fast transient response and eases loop stabilization. full protection features include over-current protection and thermal shut down. the MP1494 requires a minimal number of readily-available standard external components, and is available in a space-saving 8-pin tsot23 package. features ? wide 4.5v-to-16v operating input range ? 100m ? /40m ? low r ds(on) internal power mosfets ? high-efficiency synchronous mode operation ? fixed 500khz switching frequency ? synchronizes from a 200khz-to-2mhz external clock ? aam power-save mode ? internal soft-start ? ocp protection and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in an 8-pin tsot-23 package applications ? notebook systems and i/o power ? digital set-top boxes ? flat-panel television and monitors ? distributed power systems all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?th e future of analog ic technology? are registered trademarks of monolithi c power systems, inc. typical application in en/sync vcc aam gnd fb sw bst vin en/ sync c3 0.1 r1 40.2k r2 13k r3 90.9k r5 10k l1 c2 47 c4 c1 4.5v-16v 3.3v/2a 22 2 6 7 1 5 r4 10 3 8 4 r9 33k
MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 2 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking MP1494dj tsot-23-8 abz for tape & reel, add suffix ?z (e.g. MP1494dj?z); for rohs, compliant packaging, add suffix ?lf (e.g. MP1494dj?lf?z). package reference absolute maxi mum ratings (1) v in ..................................................-0.3v to 17v v sw ...................................................................... -0.3v (-5v for <10ns) to 17v (19v for <10ns) v bs ......................................................... v sw +6v all other pins ................................ -0.3v to 6v (2) continuous power dissipation (t a = +25c) (3) ........................................................... 1.25w junction temperature ...............................150c lead temperature ....................................260c storage temperature................. -65c to 150c recommended operating conditions (4) supply voltage v in ...........................4.5v to 16v output voltage v out ..................... 0.8v to v in -3v operating junction temp. (t j ). -40c to +125c thermal resistance (5) ja jc tsot-23-8............................. 100 ..... 55... c/w notes: 1) exceeding these ratings may damage the device. 2) about the details of en pin?s abs max rating, please refer to page 9, enable/sync control section. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb. MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 3 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics (6) v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v 1 a supply current (quiescent) i q v en = 2v, v fb = 1v, aam=0.5v 0.5 1 ma hs switch-on resistance hs rds-on v bst-sw =5v 100 m ? ls switch-on resistance ls rds-on v cc =5v 40 m ? switch leakage sw lkg v en = 0v, v sw =12v 1 a current limit (6) i limit under 40% duty cycle 3 a oscillator frequency f sw v fb =0.75v 440 500 580 khz fold-back frequency f fb v fb <400mv 0.25 f sw maximum duty cycle d max v fb =700mv 90 95 % minimum on time (6) t on_min 60 ns sync frequency range f sync 0.2 2 mhz t a =25c 791 807 823 feedback voltage v fb -40c MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 5 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, aam=0.5v, t a = 25c, unless otherwise noted. v out /ac 50mv/div. i out 1a/div. v sw 5v/div. v out 2v/div. v in 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v in 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v en 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v en 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v en 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v in 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v en 5v/div. i inductor 2a/div. v sw 5v/div. v out 2v/div. v in 5v/div. i inductor 2a/div. startup through input voltage i out = 0a shutdown through input voltage i out =0a startup through input voltage i out = 2a shutdown through input voltage i out = 2a startup through enable i out = 0a shuthdown through enable i out = 0a startup through enable i out = 2a shutdown through enable i out = 2a MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 6 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, aam=0.5v, t a = 25c, unless otherwise noted. MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 7 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions package pin # name description 1 aam advanced asynchronous modulation. connect to a voltage supply through 2 resistor dividers to force the MP1494 into non-syn chronous mode under light loads. drive aam pin high (v cc ) to force the MP1494 into ccm. 2 in supply voltage. the MP1494 operates from a 4.5v-to-16v input rail. requires c1 to decouple the input rail. connect using a wide pcb trace. 3 sw switch output. connect using a wide pcb trace. 4 gnd system ground. reference gr ound of the regulated output voltage. requires special consideration during pcb layout. connect to gnd with copper traces and vias. 5 bst bootstrap. requires a capacitor between sw and bst pins to form a floating supply across the high-side switch driver. a 10 ? resistor placed between sw and bst cap is strongly recommended to reduce sw spike voltage. 6 en/sync en high to enable the MP1494. apply an external clock can to the en pin to change the switching frequency. 7 vcc bias supply. decouple with a 0.1 f-to-0.22 f capacitor. the capacitance should not exceed 0.22 f. vcc capacitor should be put cl osely to vcc pin and gnd pin. 8 fb feedback. connect to the tap of an external resistor divider from the output to gnd to set the output voltage. the frequency fold-back co mparator lowers the oscillator frequency when the fb voltage is below 400mv to prev ent current-limit run-away during a short- circuit fault condition. MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 8 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. functional block diagram 50pf 1meg 6.5v bst rsen in oscillator vcc regulator bootstrap regulator vcc currrent sense amplifer vcc current limit comparator error amplifier reference en/sync fb + + - + - + - aam sw gnd ls driver hs driver comparator on time control logic control 1pf 400k figure 1: functional block diagram MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 9 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation the MP1494 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a very compact solution that achieves a 2a continuous output current with excellent load and line regulation over a wide input supply range. the MP1494 operates in a fixed-frequency, peak-current?control mode to regulate the output voltage. an internal clock initiates a pwm cycle. the integrated high-side power mosfet turns on and remains on until the current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, in within 95% of one pwm period, the current in the power mosfet does not reach the value set by the comp value, the power mosfet is forced to turn off. internal regulator a 5v internal regulator powers most of the internal circuitries. this regulator takes the v in input and operates in the full v in range. when v in is greater than 5.0v, the output of the regulator is in full regulation. when v in is lower than 5.0v, the output decreases, and the part requires a 0.1f ceramic decoupling capacitor. error amplifier the error amplifier compares the fb pin voltage against the internal 0.8v reference (ref) and outputs the comp voltage?comp controls the power mosfet current. the optimized internal compensation network minimizes the external component count and simplifies the control loop design. enable/sync control en/sync is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator; drive it low to turn it off. an internal 1m ? resistor from en/sync to gnd allows en/sync to be floated to shut down the chip. the en pin is clamped internally using a 6.7v series-zener-diode as shown in figure 2. connecting the en input pin through a pullup resistor to the voltage on the v in pin limits the en input current to less than 100a. for example, with 12v connected to vin, r pullup (12v ? 6.5v) 100a = 55k ? . connecting the en pin is directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to 6v to prevent damage to the zener diode. figure 2: 6.5v zener diode connection for external clock synchronization, connect a clock with a frequency range between 200khz and 2mhz 2ms after the output voltage is set: the internal clock rising edge will synchronize with the external clock rising edge. select an external clock signal with a pulse width less than 1.7 s. under-voltage lockout (uvlo) under-voltage lockout (uvlo) protects the chip from operating at insufficient supply voltage. the MP1494 uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 3.9v while its falling threshold is 3.25v. internal soft-start the soft-start prevents the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft-start voltage (ss) that ramps up from 0v to 1.2v. when ss is lower than ref, the error amplifier uses ss as the reference. when ss is higher than ref, the error amplifier uses ref as the reference. the ss time is internally set to 1.5ms. over-current-protection and hiccup the MP1494 has a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current limit threshold. meanwhile, the output voltage drops until fb is below the under-voltage (uv) threshold? typically 50% below the reference. once uv is triggered, the MP1494 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the output is dead-shorted to ground. the average short MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 10 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. circuit current is greatly reduced to alleviate thermal issues and to protect the regulator. the MP1494 exits the hiccup mode once the over- current condition is removed. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the silicon die reaches temperatures that exceed 150c, it shuts down the whole chip. when the temperature is less than its lower threshold, typically 130c, the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m1, c4, l1 and c2 (figure 3). if (v in -v sw ) exceeds 5v, u1 will regulate m1 to maintain a 5v bst voltage across c4. a 10 ? resistor placed between sw and bst cap is strongly recommended to reduce sw spike voltage. v in v out d1 m1 bst c4 r4 l1 sw u1 5v c2 figure 3: internal bootstrap charging circuit, startup and shutdown if both v in and en exceed their respective thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides a stable supply for the remaining circuitries. three events can shut down the chip: en low, v in low, and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command. MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 11 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. application information setting the output voltage the external resistor divider sets the output voltage (see typical application on page 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). choose r1 around 40k ? . r2 is then given by: out r1 r2 v 1 0.807v = ? the t-type network?as shown in figure 4?is highly recommended when v out is low. fb 8 rt r2 r1 vout figure 4: t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1: resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.0 20.5(1%) 82(1%) 82(1%) 1.2 30.1(1%) 60.4(1%) 82(1%) 1.8 40.2(1%) 32.4(1%) 56(1%) 2.5 40.2(1%) 19.1(1%) 33(1%) 3.3 40.2(1%) 13(1%) 33(1%) 5 40.2(1%) 7.68(1%) 33(1%) selecting the inductor use a1h-to-10h inductor with a dc current rating of at least 25% percent higher than the maximum load current for most applications. for highest efficiency, use an inductor with a dc resistance less than 15m ? . for most designs, the inductance value can be derived from the following equation. out in out 1 in l osc v(vv) l vif ? = where i l is the inductor ripple current. choose the inductor ripple current to be approximately 30% of the maximum load current. the maximum inductor peak current is: 2 i i i l load ) max ( l + = use a larger inductor for improved efficiency under light-load conditions?below 100ma. setting the aam voltage the aam voltage sets the transition point from aam to ccm. select a voltage to balance efficiency, stability, ripple, and transient. a low aam voltage improves stability and ripple, but degrades transient and efficiency during aam. likewise, a high aam voltage improves the transient and efficiency during aam, but degrades stability and ripple. the aam voltage comes from the tap of a resistor divider from v cc (5v) to gnd, as shown in figure 5. r3 aam vcc(5v) r4 figure 5: aam network generally, choose r4 to be around 10k ? , then r3 is: ? ? ? ? ? ? ? = 1 aam vcc r4 r3 MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 12 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. aam(v) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 024681012 v out =1.05v v out =1.8v v out =2.5v v out =5v v out =3.3v figure 6: aam values for common output voltages (v in = 4.5v to 16v) selecting the input capacitor the input current to the step-down converter is discontinuous, therefore requires a capacitor is to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. use ceramic capacitors with x5r or x7r dielectrics for best results because of their low esr and small temperature coefficients. for most applications, use a 22f capacitor. since c1 absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, add a small, high quality ceramic capacitor (e.g. 0.1 f) placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated by: load out out in in sin iv v v1 fc1v v ?? = ? ?? ?? selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low- esr electrolytic capacitors. for best results, use low esr capacitors to keep the output voltage ripple low. the output voltage ripple can be estimated by: out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? = ? + ?? ?? ?? ?? where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. for simplification, the output voltage ripple can be estimated by: out out out 2 in s1 vv v1 v 8f l c2 ?? =? ?? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: out out out esr in s1 vv v1r fl v ?? =? ?? ?? the characteristics of the output capacitor also affect the stability of the regulation system. the MP1494 can be optimized for a wide range of capacitance and esr values. MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 13 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. external bootstrap diode an external bootstrap diode can enhance the efficiency of the regulator given the following conditions: z v out is 5v or 3.3v; and z duty cycle is high: d= in out v v >65% in these cases, add an external bst diode from the vcc pin to bst pin, as shown in figure 7. sw bst MP1494 c l bst c out external bst diode vcc in4148 figure 7: optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst capacitor value is 0.1f to 1 f. pc board layout (8) pcb layout is very important to achieve stable operation especially for vcc capacitor and input capacitor placement. for best results, follow these guidelines: 1) use large ground plane directly connect to gnd pin. add vias near the gnd pin if bottom layer is ground plane. 2) place the vcc capacitor to vcc pin and gnd pin as close as possible. make the trace length of vcc pin-vcc capacitor anode-vcc capacitor cathode-chip gnd pin as short as possible. 3) place the ceramic input capacitor close to in and gnd pins. keep the connection of input capacitor and in pin as short and wide as possible. 4) route sw, bst away from sensitive analog areas such as fb. it?s not recommended to route sw, bst trace under chip?s bottom side. 5) place the t-type feedback resistor r9 close to chip to ensure the trace which connects to fb pin as short as possible notes: 8) the recommended layout is based on the figure 8 typical application circuit on the next page. 8 7 6 5 l1 c2 c2a c1 c1a r5 r6 r7 r9 r8 r1 r2 r3 r4 c3 c4 c5 c6 1 2 3 4 vin gnd vout sw gnd gnd sw gnd en/sync bst vcc MP1494 ? synchronous step-down converter MP1494 rev. 1.04 www.monolithicpower.com 14 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application circuits MP1494 c1a ns in 2 7 1 5 3 8 6 4 vcc aam en/sync gnd fb sw bst u1 r7 90.9k r2 13k r1 40.2k r3 0 c3 15pf 3.3v r4 10 r9 33k r5 28.7k r6 11k r8 10k c5 1nf figure 8: 12v in , 3.3v/2a MP1494 ? synchronous step-down converter notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP1494 rev. 1.04 www.monolithicpower.com 15 12/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information tsot23-8 front view note: 1) all dimensions are in millimeters. 2) package length does not include mold flash, protrusion or gate burr. 3) package width does not include interlead flash or protrusion. 4) lead coplanarity (bot tom of leads after forming) shall be 0.10 millimeters max. 5) jedec reference is mo-193, variation ba. 6) drawing is not to scale. 7) pin 1 is lower left pin when reading top mark from left to right, (see example top mark) top view recommended land pattern seating plane side view detail ''a'' see detail ''a'' pin 1 id see note 7 example top mark |
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